Boundary Scan 1149.6 Technology

IEEE Standard 1149.1 & 1149.6

Boundary Scan (IEEE Standard 1149.1 and 1149.6) is a technology that allows silicon manufacturers to design testability into the components that they manufacture.

Teradyne offers developers a choice of boundary scan test options:

  • BasicSCAN and Scan Pathfinder are native to TestStation in-circuit test systems
  • Partnership benchtop boundary scan solutions are available from select vendors

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  • BasicSCAN

    The BasicSCAN test relies on using tester nails to detect opens on device pins, therefore it is designed for test situations where the tester has access to a majority of the device pins.

    Test generation capabilities and features:

    • Ability to import device boundary scan description information in either industry standard BSDL format or TestStation's simple IBS file format
    • Graphical user interface that allows easy entry and modification of device boundary scan information
    • Ability to generate a BSDL model from information entered into the BasicSCAN user interface
    • Checks for correct Instruction Register capture value and proper register lengths
    • Checks optional component IDCODE and USERCODE values
    • Detects open faults on any device pins that are nailed
    • Checks internal logic of components that support the optional RUNBIST instruction
    • Automatic generation of isolation sections that tell the test generator how to shut off the boundary scan component while testing other components on the board
    • Accurate pin-level diagnostic messages
    • Powerful Digital Test language features so no user modifications are required to support complex wiring configurations
  • Scan Pathfinder

    Test generation capabilities:

    • Support for boards that have multiple scan paths
    • Automatic generation of boundary scan test programs based on detected scan path configuration
    • Automatic generation of isolation vectors that can be used to disable all boundary scan devices while executing the conventional in-circuit tests
    • Support for boundary scan test program customization via UserOption settings
    • Hardware Test
    • Opens Test
    • Interactions Test
    • Interconnect Test
    • Shortened CAP Test
    • RunBIST Test
    • Virtual Digital Test
    • Comprehensive test reports that can be viewed in graphical report summary windows or as text files
    • Separate Boundary Scan Run-Time Diagnostic task ensures accurate device and pin-level diagnostic messages
  • Partnership Solutions

    Symphony (JTAG Technologies)

    Symphony is an advanced boundary scan solution designed in partnership with JTAG Technologies specifically for manufacturers using TestStation.

    ScanExpress (Corelis)

    ScanExpress is a popular JTAG test development and execution tool used to test for basic shorts/opens/bad/missing defects and to perform in-system programming of memory and CPLDs on circuit boards.


    GOEPEL electronic offers an integrated option for TestStation utilizing specifically designed SCANFLEX device in combination with the JTAG/Boundary Scan system software CASCON GALAXY.

  • Reference Library